With AMD’s Zen 5 CPU construction solely a month away from its first product releases, the model new CPU construction was positioned entrance and center for AMD’s prime Computex 2024 keynote. Outlining how Zen 5 will end in improved merchandise all through AMD’s complete portfolio, the company laid out their product plans for the whole triad: mobile, desktop, and servers. And whereas server chips can be the ultimate components to be launched, AMD moreover saved among the finest for ultimate by showcasing a 192 core EPYC “Turin” chip.
Turin is the catch-all codename for AMD’s Zen 5-based EPYC server processors – what’s going to presumably be the EPYC 9005 sequence. The company has beforehand disclosed the title in earnings calls and completely different investor capabilities, outlining that the chip was already sampling to shoppers and that the silicon was “looking great.”
The Computex reveal, in flip, is the first time that the silicon has been confirmed off to most of the people. And with it, we’ve acquired the first official affirmation of the chip’s specs. With SKUs as a lot as 192 CPU cores, it’s going to be a monster of an x86 CPU.
AMD EPYC CPU Generations | ||||
AnandTech | EPYC fifth Gen (Turin, Z5c) |
EPYC 9704 (Bergamo) |
EPYC 9004 (Genoa) |
EPYC 7003 (Milan) |
CPU Construction | Zen 5c | Zen 4c | Zen 4 | Zen 3 |
Max CPU Cores | 192 | 128 | 96 | 64 |
Memory Channels | 12 x DDR5 | 12 x DDR5 | 12 x DDR5 | 8 x DDR4 |
PCIe Lanes | 128 x 5.0 | 128 x 5.0 | 128 x 5.0 | 128 x 4.0 |
L3 Cache | ? | 256MB | 384MB | 256MB |
Max TDP | 360W? | 360W | 400W | 280W |
Socket | SP5 | SP5 | SP5 | SP3 |
Manufacturing Course of |
CCD: TSMC N3 IOD:TSMC N6 |
CCD: TSMC N5 IOD: TSMC N6 |
CCD: TSMC N5 IOD: TSMC N6 |
CCD: TSMC N7 IOD: GloFo 14nm |
Launch Date | H2’2024 | 06/2023 | 11/2022 | 03/2021 |
Though solely a brief tease, AMD’s Turin showcase did affirm plenty of, long-suspected particulars regarding the platform. AMD will as quickly as as soon as extra be using their socket SP5 platform for Turin processors, which suggests the chips are drop-in applicable with EPYC 9004 Genoa (and Bergamo). The reuse of SP5 signifies that shoppers and server distributors can immediately swap out chips with out having to assemble/deploy total new strategies. It moreover signifies that Turin can have the an identical base memory and I/O decisions as a result of the EPYC 9004 sequence: 12 channels of DDR5 memory, and 128 PCIe 5.0 lanes.
With regards to power consumption, current SP5 processors excessive out at 400 Watts, and we’d anticipate the an identical for these new, socket-compatible chips.
As for the Turin chip itself, whereas AMD shouldn’t be going into extra factor on its configuration, all indicators stage to this being a Zen 5c configuration – that’s, constructed using CCDs designed spherical AMD’s compact Zen 5 core configuration. This would possibly make the Turin chip on present the successor to Bergamo (EPYC 9704), which was AMD’s first compact core server processor, using Zen 4c cores. AMD’s compact CPU cores normally commerce off per-core effectivity in favor of allowing additional CPU cores complete, with lower clockspeed limits (by design) and fewer cache memory all via the chip.
In accordance with AMD, the CCDs on this chip have been fabbed on a 3nm course of (undoubtedly TSMC’s), with AMD apparently making an attempt to learn from the densest course of accessible with a view to maximise the number of CPU cores the can place on a single chip. Even then, the CCDs featured listed under are pretty sizable, and whereas we’re prepared for official die measurement numbers, it would come as no shock if Zen 5’s elevated transistor rely larger than offset the realm monetary financial savings of shifting to 3nm. Nonetheless, AMD has been able to squeeze 12 CCDs on to the chip – 4 larger than Bergamo – which is what’s letting them provide 192 CPU cores instead of 128 as throughout the ultimate know-how.
Within the meantime, the IOD is confirmed to be produced on 6nm. Judging from that actuality, the pictures, and what AMD’s doing with their Zen 5 desktop merchandise, there’s an outstanding chance that AMD is using each the an identical or a very comparable IOD as on Genoa/Bergamo. Which inserts hand-in-hand with the socket/platform on the completely different end of the chip staying the an identical.
AMD’s transient teaser didn’t speak about the least bit another Turin configurations. So there’s nothing else official to share about Turin chips constructed using full-sized Zen 5 CPU cores. With that talked about, everyone knows that the full-fat cores going into the Ryzen 9000 desktop sequence pack 8 cores to a CCD and are being fabbed on a 4nm course of – not 3nm – so that strongly implies that EPYC Zen 5 CCDs can be the an identical. Which, if that pans out, signifies that Turin chips using extreme effectivity cores will max out at 96 cores, the an identical as Genoa.
{{Hardware}} configurations aside, AMD moreover showcased a couple of benchmarks, pitting the model new EPYC chips in direction of Intel’s Xeons. As you’d anticipate in a keynote teaser, AMD was profitable handily. Though it’s attention-grabbing to note that the chips benchmarked have been all 128 core Turins – which suggests these benchmarks may have been on chips using the full-fat cores.
AMD may be transport EPYC Turin throughout the second half of this yr. Additional particulars on the chips and configurations will observe as quickly as AMD will get nearer to the EPYC launch.
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